This invention relates generally to computer controlled video displays and is particularly directed to a bit-mapped video graphics system in which a separate plane, or RAM array, is used for presentation of either the primary colors in a color display or various shades of gray in a monochrome display.
In general, a video display system utilizing a cathode ray tube (CRT) provides discrete picture elements for presentation of symbols and a display memory for storage of digital signals representative of picture elements of the video display. These systems further include a computer having a program memory for receiving digital input signals and providing data signals and other digital output signals representing picture elements in response to various input signals. A video processor, or controller, is typically connected to the computer and display memory for selectively modifying the picture element output signals from the computer in response to the output data signals and for transferring the thus modified picture element signals to the display memory. The video processor is also coupled to the CRT display for providing signals thereto in response to the digital picture information stored in the display memory whereby the picture elements represented therein are displayed.
Each frame of the picture displayed on a CRT is comprised of a plurality of picture elements termed pixels which are rapidly and sequentially displayed in the raster scan of the video display's faceplate. A random access memory (RAM) may store digital data representative of each picture element to be displayed on the screen. The digital data stored in the RAM is read synchronously therefrom with the raster scanning of the picture elements of the video display. This digital data is converted to signals for driving the CRT in defining the particular pixels being displayed. A microcomputer which includes a programmed central processing unit (CPU), or microprocessor, may be used to update or modify the data stored in the RAM and to modify the picture presented on the video display in response to signals transmitted from user initiated control inputs in accordance with the microprocessor's program.
In many prior art microcomputer controlled displays, color information is stored as three digital bits which are used to designate green, red and blue. A fourth bit for providing high/low intensity control is also sometimes provided. Prior art video displays have generally provided the capability to blank the monitor under certain operating conditions, as desired. For example, during a system reset operation, the video display is typically blank in order to avoid displaying uninitialized memory at power-up or system reset. This permits the video display's read only memory (ROM), in which is stored a suitable operating program and a desired assembler or compiler, to clear the system's memory before enabling the video RAM in which is stored video display mapping information.
In certain circumstances it may be desirable to selectively inhibit a portion of memory dedicated to one or more of the aforementioned primary colors. For example, in displaying graphic information it is frequently necessary to display different parameters or sets of data in different colors and to individually and/or in combination present this information in order to facilitate distinguishing one set of data from another. In addition, some applications may require the sequential presentation of various display scenes or formats in a continuous manner. Prior art video display systems which have afforded these capabilities have generally required large dedicated memories and are consequently rather complicated and expensive.
The present invention is intended to overcome the aforementioned limitations of the prior art by providing a computer controlled video display system in which each of the three video memory planes, each dedicated to a primary color, may be selectively disabled as desired. When disabled, a video plane may be used as any normal page of RAM for any other application providing the system with an expanded memory capacity when one of the video planes is disabled as well as an enhanced display capability when all video planes are utilized.